| H.264 Main Profile (MP) Decoder |
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| Supported standard implementations |
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Main Profile (4:2:0, 8-bit) @ Level 4.2 |
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| Input |
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Transport Stream (TS) |
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Video Elementary Stream (ES) |
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| Output |
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Decoded stream in YUV 4:2:0 format |
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| Salient Features |
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Supports 8-bit color bit depth |
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Supports 4:2:0 chroma format |
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Supports resolutions from QCIF (176x144) to FullHD(1920x1080) progressive and interlaced |
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Frame-rate up to 60 fps for HD decode |
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Simultaneous multi-channel decode |
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Fully validated on custom-built hardware using ITU-T and Fraunhofer test streams |
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Optimized both for memory and performance |
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Lower gate count |
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Supports very low to very high bit-rates |
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Supports both Intra frame only (H.264 Intra) and Inter frame (IPB) decoding |
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Available on Xilinx & Altera FPGAs |
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| Deliverables |
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Netlist / Verilog Source code of IP core |
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Test bench |
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Test report |
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User manual |
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Design document |
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| Target Applications |
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Broadcast & Professional Video |
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Broadcast Contribution & Distribution |
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Video Servers |
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Test & Measurements |
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High End Consumer Electronics |
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Security & Surveillance |
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| For more information on the above IP Cores, please write to us at videoips@coreel.com |
