| 8:00 - 9:00 |
1:00 |
Registration and Visit to Ecosystem Partners Booth |
| 12:00 - 12:50 |
0:50 |
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High Speed Memory Interfaces
| While the vision of seamless data sharing via wireless is transitioning from being a fantasy to reality, new challenges associated with traffic management, security, and increased spectral efficiency are driving the demand for highly flexible solutions demanding extreme processing performance. In this session, you will learn how many of the challenges of the next generation wireless technologies are addressed using state-of-the art FPGA solutions. |
| This session will introduce the architecture of the Spartan-3 and Spartan-3E families. It will focus on specific features that reduce area utilization and design techniques that allow the user to meet design requirements in a smaller/slower speed grade device. We will also discuss how by taking advantage of some Spartan-3 features, system designers can potentially reduce the size and number of layers of the system PCB. |
| Source Synchronous IO -Virtex-4 FPGAs include unique built-in ChipSync circuitry that accelerates the implementation of source-synchronous designs. We discuss these innovations and their usage in developing single-data-rate and double-data-rate LVDS applications. We also demonstrate how to build successful source-synchronous designs for SFI-4, SPI-4.2, and more. |
| Designers today are constrained by space, power, and cost and simply can not afford to implement embedded designs with Pentium class computers. Fortunately, in embedded systems, the greatest computational requirements are frequently determined by a relatively small number of algorithms. In this module, a high performance embedded PowerPC system in the Xilinx Virtex-4 FX FPGA will be created using the award-winning Xilinx Platform Studio 7.1i tool suite. Come and learn how computationally intensive tasks can be rapidly converted through design automation tools into hardware co-processors. These co-processors can then be efficiently interfaced to the offloaded PowerPC yielding Pentium class performance. |
| High speed memroy design is getting more and more challenging. It not only require users to build different kind of high bandwidth memory interfaces, but also require users to create a memory controller with datapath infrastructure that is scalable and can maximize the use of bandwidth available. In this presentation we will discuss ChipSync technology as well as MIG (Xilinx Memory Interface Generator) in how to architect your your systems with these requirements in mind. |
| Digital Convergence is driving the proliferation of a wide range of new consumer appliances at a blistering pace. Product definition to obsolescence cycles for appliances such as smart handsets can be measured in periods reaching less than a year. Because the purchase decision of long-term subscription services is typically based upon the purchase of handsets that offer new features and capabilities, the opportunity cost of not having the killer feature can be quite high. Designing a handset that contains the right killer features, hits essential price-points, with extended battery life, while hitting the narrow market window is close to impossible without programmable logic. This presentation will explore the uses of programmable logic addressing the challenges of designing next generation handsets. |
| Present and future aerospace and defense applications continue to demand ever increasing performance, density, and above all flexibility from FPGAs. The Virtex families of re-configurable FPGAs provide the technology to meet these demands. Various members of these families are currently available in both COTs and SMD formats, as well as in radiation tolerant versions. Xilinx is also fully supporting a recently announced software tool that automates the implementation of TMR (Triple Modular Redundancy) into members of these FPGA families for mission critical applications. This paper will focus on Xilinx currently available Virtex solutions, while also discussing Xilinx's future development efforts |
| Many current processor-based platforms are inadequate to satisfy the demands of the increasing complexity and performance constraints of embedded systems. Poseidon's Triton tools suite improves the performance of existing processor-based platforms through application specific hardware accelerator generation. The elimination of manual effort for RTL coding, device driver coding etc. results in reducing system design cycle and design risk drastically. With players like Xilinx embedding processors like PowerPC and MicroBlaze in the FPGA fabrics, Poseidon's Triton tools become essential to design efficient systems with enhanced performance and reduced design cycle.
Triton tools synthesize application specific hardware accelerators. With the use of automated flow, system designers achieve dramatic performance improvements at lower power dissipation for processor-based platforms. The tools are optimized for DSP, audio, video, VoIP, imaging, wireless, storage, and security devices. Triton Tools support Xilinx's Virtex II, Virtex II-Pro and Virtex-4T FX with Auxiliary Processing Unit (APU), all of which contain PowerPC 405 processor. |
| Wind River Workbench is an open, standards-based device software development environment. Through its unique combination of capabilities, integration and availability, Workbench enables organizations to standardize on a common environment for device software development, helping developers, project teams and enterprises improve their effectiveness. Workbench provides the best-in-class capability in each phase of the development process, including hardware bring-up, ?rmware development, application software development and system test. Workbench can be used as the software development IDE with Windriver Hardware JTAG debuggers to speeden hardware bring up, device drivers and evne application debugging. Learn more about the Wind River Workbench and how it can accelerate your development by attending this session. |
| As the market transitions from PCI to PCI Express, Xilinx, with its low cost programmable PCI Express solutions will help you benefit from the advantages of PCI Express. This session will look at the PCI Express technology, its advantages and expanding applications space, detailed information on Xilinx's offering and, system level considerations for PCI Express. |
| This module will discuss how to maximize the performance of the XtremeDSP slice in V4 FPGA. Coding techniques will be introduced to facilitate the tools to take advantage of the XtremeDSP Slice to maximize performance. A demo will presented to show the performance gained when correct coding style is adopted using Synplify Pro 8.1. Beside coding, the faster way to extract the performance of the XtremeDSP slice is to use System Generator For DSP. This module will discuss the DSP design flow using System Generator and some of the advance features available. |
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| 17:10 - 17:30 |
0:20 |
Q/A, Wrap up, Second Lucky Draw |
